1. Field of the Invention
The present invention relates generally to a solid-state image sensor and, more particularly, to the structure of the sensor elements of a hole accumulation diode construction (HAD construction) of a charge coupled device image sensor (CCD image sensor).
2. Description of the Prior Art
FIG. 3 shows the structure of a CCD image sensor of an interline transfer system. Referring to FIG. 3, the CCD image sensor has an image sensing unit 3 comprising a plurality of sensor elements 1 arranged in vertical and horizontal rows in a two-dimensional arrangement to accumulate electric signal charges corresponding to the quantity of incident light, and a plurality of vertical shift registers (vertical transfer units) 2 each connected to the sensor elements 1 in each vertical row to transfer electric signal charges read from the sensor elements 1 of the corresponding vertical row.
The electric signal charges produced by the sensor elements 1 through photoelectric conversion are read instantaneously in a vertical blanking interval by the vertical shift register. The electric signal charges corresponding to one scanning line among those read by the vertical shift register 2 are transferred to a horizontal shift register 4 in each horizontal blanking interval. The electric signal charges corresponding to one scanning line are transferred sequentially in a horizontal direction by the horizontal shift register 4. An output circuit 5, such as a floating diffusion amplifier (FDA) or the like, is connected to the output end of the horizontal shift register 4. The output circuit 5 detects the electric signal charges obtained by the sensor elements 1 through photoelectric conversion and transferred by the vertical shift registers 2 and the horizontal shift register 4, and converts the electric signal charges into corresponding electric signals and provides television signals.
As shown in FIG. 4, holes produced in the sensor element 1 by the light received by the sensor element 1 are discharged through a channel stop region 6 to the ground (GND) of the CCD image sensor. Since a p-type region serving as the channel stop region 6 has a low impurity concentration and a small width, the resistance against the the hole current is relatively high. Accordingly, when a large quantity of light falls on the sensor element 1, the surface potential of the sensor element 1 varies and the operating characteristics of the sensor element 1 change because the potential of the channel stop region 6 is caused to change by the hole current. Consequently, an extraordinarily large quantity of electric charges is accumulated in the sensor element 1, causing electric signal charges to overflow the vertical shift register 2 (vertical CCD).
A prior art CCD image sensor is provided with sensor elements 1 having channel stop regions 6 formed in a high impurity concentration to reduce the resistance against the hole current produced through photoelectric conversion. As shown in FIGS. 5(a) and 5(b), a p.sup.+ -type channel stop region 7 having a high impurity concentration higher than that of the channel stop region 6 is formed in the inner portion of the channel stop region 6 to reduce the resistance against the hole current. However, when the CCD image sensor is subjected to heat treatment in a semiconductor device fabricating process, the anomalous diffusion of the impurity contained in the p.sup.+ -type channel stop region 7 occurs to spoil the vertical shift register 2 (vertical CCD). Consequently, the effective width of the vertical shift register 2 is reduced and the quantity of electric charges to be dealt with by the vertical shift register 2 is reduced.
The sensor elements 1 are spoiled likewise by the anomalous diffusion of the impurity contained in the p.sup.+ -type channel stop region 7. Consequently, when an electronic shutter operation is performed to discharge the electric signal charges accumulated in the sensor elements 1 into the semiconductor substrate, capacitive coupling is produced to increase the capacitance of the channel stop region 6. Therefore, the overflow barrier will not readily collapse even if the amplitude of a voltage pulse applied to the semiconductor substrate is increased and hence a voltage pulse having a still larger amplitude must be applied to the semiconductor substrate.